Wide memory architecture vector processor using nxP bits wide me

Electrical computers and digital processing systems: processing – Processing architecture – Vector processor

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G06F 9312

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active

059283505

ABSTRACT:
A wide memory architecture is provided for storing data associated with a vector processor. Additionally, a method for accessing a wide memory architecture is provided. The wide memory architecture includes a memory for storing an array of vector operands. The memory is coupled to a data bus which provides an access pathway connecting the memory to a processor. The wide memory architecture further includes at least one staging buffer disposed between the memory and the processor. The staging buffer is capable of providing intermediate storage of a vector operand upon which a function can be performed by the processor.

REFERENCES:
patent: 5251173 (1993-10-01), Wong
Hodges, David A., Jackson, Horace G., Analysis and Design of Digital Integrated Circuits, 2.sup.nd ed, McGraw-Hill, 1988, pp. 74, 242, 301, 367 .

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