Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
Reexamination Certificate
2000-12-15
2004-12-07
Pan, Daniel H. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Specialized instruction processing in support of testing,...
C712S219000, C714S034000, C714S039000
Reexamination Certificate
active
06829701
ABSTRACT:
BACKGROUND
This invention relates to generation of watchpoints for a pipelined processor.
Code developed for complex integrated circuit devices such as pipelined processors typically requires extensive debugging. It is helpful to generate watchpoints that monitor the propagation of instructions through the processor pipeline. For this reason, a watchpoint engine can be provided to extract state information from the processor pipeline and provide the state information to a control unit for event handling. In this manner, application developers can verify proper code operation and thereby debug code developed for the processor.
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patent: 0 992 905 (2000-04-01), None
“Internal instruction frequency monitoring”, IBM Technical Disclosure Bulletin, IBM Corp., 35(1B):246-248, Jun. 1992 (XP000309047).
Overkamp Gregory A.
Roth Charles P.
Singh Ravi P.
Fish & Richardson P.C.
Pan Daniel H.
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