Reducing data hazards in pipelined processors to provide...
Reducing data hazards in pipelined processors to provide...
Reducing inherited logical to physical register mapping...
Reducing instruction transactions in a microprocessor
Reducing multiplexer circuitry associated with a processor
Reducing multiplexer circuitry for operand select logic...
Reducing the fetch time of target instructions of a...
Reducing the fetch time of target instructions of a...
Reducing the length of lower level instructions by splitting...
Register access scheduling method for multi-bank register...
Register adjustment based on adjustment values determined at...
Register allocation method and system for program compiling
Register allocation technique
Register allocation via selective spilling
Register and instruction controller for superscalar processor
Register bit scanning
Register change summary resource
Register file access
Register file and operating system thereof
Register file backup queue