Floating point operation system which determines an exchange ins
Floating point register stack management for CISC
Floating point stack manipulation using a register map and specu
Floating point status/control register encodings for...
Floating point unit pipeline synchronized with processor...
Floating point unit pipeline synchronized with processor...
Floating point unit pipeline synchronized with processor...
Floating point unit using a central window for storing instructi
Floating point unit with try-again reservation station and...
Floating point unit with variable speed execution pipeline...
Floating-point processor with operand-format precision greater t
Floating-point unit which utilizes standard MAC units for...
Flow optimization and prediction for VSSE memory operations
Flow optimization and prediction for VSSE memory operations
Flushable free register list having selected pointers moving...
Forcing regularity into a CISC instruction set by padding...
Forwarding instruction byte blocks to parallel scanning...
Forwarding load data to younger instructions in annex
Forwarding store instruction result to load instruction with red
Forwarding stored dara fetched for out-of-order load/read...