Flow optimization and prediction for VSSE memory operations

Details Flow optimization and prediction for VSSE memory operations Flow optimization and prediction for VSSE memory operations

2008-07-22

2008-07-22

Chan, Eddie P (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Vector processor

C712S007000, C712S006000, C712S005000, C712S004000, C717S139000, C717S140000

Reexamination Certificate

active

07404065

ABSTRACT:
In one embodiment, a method for flow optimization and prediction for vector streaming single instruction, multiple data (SIMD) extension (VSSE) memory operations is disclosed. The method comprises generating an optimized micro-operation (μop) flow for an instruction to operate on a vector if the instruction is predicted to be unmasked and unit-stride, the instruction to access elements in memory, and accessing via the optimized μop flow two or more of the elements at the same time without determining masks of the two or more elements. Other embodiments are also described.

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Author: Michael Wolfe, Title: “Vector optimization vs vectorization”, Date: 1988, Publisher: Academic Press, Pertinent pp. 309-315.

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