Central processing unit and system counting instructions in...

Central processing unit and system having a prefetch queue...

Central processing unit architecture with multiple pipelines...

Central processing unit for easily testing and debugging...

Central processing unit having branch instruction...

Central processing unit having instruction queue of 32-bit lengt

Central processing unit having instruction queue of 32-bit...

Central processing unit including APX and DSP cores and includin

Central processing unit including APX and DSP cores which receiv

Central processing unit method and apparatus for extending...

Central processing unit with integrated graphics functions

Central processing unit with integrated graphics functions

Chained operation of functional components with DONE and GO...

Changing instruction order by reassigning only tags in order...

Changing instruction set architecture mode by comparison of...

Check instruction and method

Checking data type of operands specified by an instruction...

Checking for exception by floating point instruction...

Checkpoint table for selective instruction flushing in a specula

Circuit and method for initiating exception routines using...