Central processing unit including APX and DSP cores and includin

Details Central processing unit including APX and DSP cores and includin Central processing unit including APX and DSP cores and includin

1997-11-14

2000-07-04

Donaghue, Larry D.

Electrical computers and digital processing systems: processing

Instruction decoding

Predecoding of instruction component

712 23, 712 35, 712207, G06F 930, G06F 15163

Patent

active

06085314&

ABSTRACT:
A CPU or microprocessor which includes a general purpose CPU component, such as an X86 core, and also includes a DSP core. In a first embodiment, the CPU receives general purpose instructions, such as X86 instructions, wherein certain X86 instruction sequences implement DSP functions. The CPU includes a processor mode register which is written with one or more processor mode bits to indicate whether an instruction sequence implements a DSP function. The CPU also includes an intelligent DSP function decoder or preprocessor which examines the processor mode bits and determines if a DSP function is being executed. If a DSP function is being implemented by an instruction sequence, the DSP function decoder converts or maps the opcodes to a DSP macro instruction that is provided to the DSP core. The DSP core executes one or more DSP instructions to implement the desired DSP function in response to the macro instruction. If the processor mode bits indicate that X86 instructions in the instruction memory do not implement a DSP-type function, the opcodes are provided to the X86 core as which occurs in current prior art computer systems. In a second embodiment, the CPU receives sequences of instructions comprising X86 instructions and DSP instructions. The processor mode register is written with one or more processor mode bits to indicate whether an instruction sequence comprises X86 or DSP instructions, and the instructions are routed to the X86 core or to the DSP core accordingly.

REFERENCES:
patent: 4173041 (1979-10-01), Dvorak et al.
patent: 5355485 (1994-10-01), Denio et al.
patent: 5542059 (1996-07-01), Blomgren
patent: 5588118 (1996-12-01), Mandava et al.
patent: 5619665 (1997-04-01), Emma
patent: 5721945 (1998-02-01), Mills et al.
patent: 5740420 (1998-04-01), Palaniswami
patent: 5768553 (1998-06-01), Tran
patent: 5781750 (1998-07-01), Blomgren et al.
patent: 5781792 (1998-07-01), Asghar et al.
patent: 5784640 (1998-07-01), Asghar et al.
patent: 5790824 (1998-08-01), Asghar et al.
patent: 5794068 (1998-08-01), Asghar et al.
patent: 5829031 (1998-10-01), Lynch
patent: 5854913 (1998-12-01), Goetz et al.
International Search Report for PCT/US 96/19586 dated Apr. 28, 1997.
Halfhill, T.R., "AMD K6 Takes on Intel P6," BYTE, vol. 21, No. 1, Jan. 1, 1996, pp. 67, 68, 70 & 72.
International Search Report for PCT/US 97/01067 mailed Jun. 2, 1997.
International Search Report for PCT/US 98/10175 dated Sep. 2, 1998.

Affiliated with

Also associated with

Rating

Central processing unit including APX and DSP cores and includin does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Central processing unit including APX and DSP cores and includin, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Central processing unit including APX and DSP cores and includin will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1496394