Thread suspension system and method
Thread switch logic in a multiple-thread processor
Thread switch on blocked load or store using instruction...
Thread-specific branch prediction by logically splitting...
Three input arithmetic logic unit with barrel rotator and mask g
Three input arithmetic logic unit with shifter and mask generato
Three state branch history using one bit in a branch...
Threshold-based load address prediction and new thread...
Throwing one selected representative exception among...
Time-multiplexed speculative multi-threading to support...
Time-of-life counter for handling instruction flushes from a...
Total flexibility of predicted fetching of multiple sectors...
Trace branch prediction unit
Trace compression method for debug and trace interface...
Trace control circuit adapted for high-speed microcomputer...
Trace control circuit adapted for high-speed microcomputer...
Training line predictor for branch targets
Transaction redirection mechanism for handling late...
Transparent concurrent atomic execution
Transparent concurrent atomic execution