Trace control circuit adapted for high-speed microcomputer...

Details Trace control circuit adapted for high-speed microcomputer... Trace control circuit adapted for high-speed microcomputer...

2006-02-07

2006-02-07

Treat, William M. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Specialized instruction processing in support of testing,...

C714S045000

Reexamination Certificate

active

06996704

ABSTRACT:
A branching source address in an absolute address representation and a branching destination address in a relative address representation are captured from a CPU so that the branching source address and the branching destination address are output tot he trace bus.

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patent: 6523136 (2003-02-01), Higashida
patent: 6594782 (2003-07-01), Tagawa
patent: 6615370 (2003-09-01), Edwards et al.
patent: 3-240839 (1991-10-01), None
patent: 3-266140 (1991-11-01), None
patent: 5-197549 (1993-08-01), None
“Logic Interface to Allow High Performance Event Tracing With Low Performance Monitoring Devices”, IBM Technical Disclosure Bulletin, vol. 29, No. 5, p. 2076-2079, Oct. 1986.

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