Transaction redirection mechanism for handling late...

Electrical computers and digital processing systems: processing – Processing control – Processing sequence control

Reexamination Certificate

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C712S226000

Reexamination Certificate

active

10045564

ABSTRACT:
Redefined hardware structured transactions and the associated responses in a data processing device are made user programmable. Three registers, a identifier register, a mask register and a response register, are used to redirect transactions or other operations within an application specific integrated circuit after post-silicon testing has been completed and there is no opportunity to redirect the hardware logic contained therein. When enabled, the registers allow for the insertion of blank table entries that can be programmed at a later time to handle unexpected output responses which occur due to unforeseen problems in the preprogrammed operation of the device. Transaction redirection can be accomplished on selected fields of identified transactions. The method is applicable to any hardware device in which it is desired to redirect actions originally defined in look-up tables when such tables are not capable of adjustment or alteration without redesign or re-manufacture.

REFERENCES:
patent: 3889242 (1975-06-01), Malmer, Jr.
patent: 5602764 (1997-02-01), Eskandari-Gharnin et al.
patent: 5790843 (1998-08-01), Borkenhagen et al.
patent: 5796972 (1998-08-01), Johnson et al.
patent: 6006030 (1999-12-01), Dockser
patent: 6304477 (2001-10-01), Naji
patent: 6427202 (2002-07-01), Richardson et al.
IBM Technical Disclosure Bulletin, vol. 37 No. 03. IBM Corp. Mar. 1994. Pages 321-324.
“The PowerPC Architecture: A specification for a new family of RISC processors.” Second Edition (May 1994), Morgan Kaufmann Publishers, Inc. Pages 19-23.
Kime et al. “Logic and Computer Design Fundamentals: 2nd Edition.” Prentice Hall, 2000. Pages 121-122.
Handy, Jim, The Cache Memory Book, The authoritative reference on cache design, Academi Press, 1998, pp. 14-18.
COMPARATOR definition, Computer Desktop Encyclopedia, copyright 1981-2004.
COMBINATIONAL (COMBINATORIAL) LOGIC definition, Computer Desktop Encyclopedia, copyright 1981-2004.

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