Floating point NaN comparison

Details Floating point NaN comparison Floating point NaN comparison

1997-10-21

1999-08-03

Eng, David Y.

Electrical computers and digital processing systems: processing

Processing control

Arithmetic operation instruction processing

G06F 9302

Patent

active

059319437

ABSTRACT:
A circuit for comparing and selecting NaN inputs is disclosed. Each NaN input is transformed by appending a sign bit to the end of a significand. In one particular embodiment, the inverse of the sign bit is appended to the significand. Accordingly, the transformed inputs include the significand and a least significant bit which indicates whether the input was positive or negative. The transformed inputs are compared by a comparator circuit such as a carry tree. An output of the carry tree controls a multiplexer which selects a first input if a first transformed input is greater than or equal to a second transformed input, and selects a second input if the second transformed input is greater than the first transformed input.

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