Filter micro-coded accelerator

Details Filter micro-coded accelerator Filter micro-coded accelerator

2004-03-31

2010-11-09

Kindred, Alford W (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

Processing sequence control

Reexamination Certificate

active

07831819

ABSTRACT:
Method and apparatus for a filter micro-code accelerator are described.

REFERENCES:
patent: 4791603 (1988-12-01), Henry
patent: 4862407 (1989-08-01), Fette et al.
patent: 6081888 (2000-06-01), Bell et al.
patent: 6725364 (2004-04-01), Crabill
Alsolaim et al.; “Architecture and Application of a Dynamically Reconfigurable Hardware Array for Future Mobile Communications Systems”; 2000; IEEE.
Becker et al.; “DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communication Applications”; 2000; Springer-Verlag.
Chun et al.; Application of the Intel Reconfigurable Communications Architecture to 802.11a, 3G and 4G Standards; 2004; IEEE.

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