Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing
Patent
1997-08-21
1999-11-02
Kim, Kenneth S.
Electrical computers and digital processing systems: processing
Processing control
Arithmetic operation instruction processing
712229, 712 23, 708495, 708525, G06F 9302
Patent
active
059789018
ABSTRACT:
A superscalar microprocessor includes a combination floating point and multimedia unit. The floating point and multimedia unit includes one set of registers. The multimedia core and floating point core share the one set of registers. Each register as a type field associated with the register. The type field identifies whether the associated register contains valid data and whether the data is of multimedia type or floating point type. If the register stores floating point type data, the type field further indicates which of a plurality of floating point types the register stores such as: zero, infinity and normal. The floating point core relies on the type field to identify special floating point numbers such as zero and infinity. To ensure predictable results when a floating point instruction is executed subsequent to a multimedia instruction, a retyping algorithm retypes registers typed as multimedia type when the first floating point instruction subsequent to a multimedia instruction is executed. The retyping algorithm reads each register and reclassifies the registers classified as multimedia type. The reclassification algorithm classifies the contents of the register interpreted as floating point data.
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Ahmed Ashraf
Hinds Chris N.
Luedtke Mark R.
Miller Paul K.
Advanced Micro Devices , Inc.
Kim Kenneth S.
Kivlin B. Noel
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