Management of both renamed and architected registers in a supers

Mechanism for self-initiated instruction issuing and method...

Method and apparatus for constructing a pre-scheduled...

Method and apparatus for controlling an instruction pipeline in

Method and apparatus for controlling an instruction pipeline...

Method and apparatus for dispatching instructions to execution u

Method and apparatus for distributing commands to a...

Method and apparatus for dual issue of program instructions to s

Method and apparatus for executing instructions

Method and apparatus for forming and dispatching instruction...

Method and apparatus for implementing two architectures in a...

Method and apparatus for improving dispersal performance in...

Method and apparatus for improving dispersal performance in...

Method and apparatus for separate control processing and...

Method and apparatus for token triggered multithreading

Method and apparatus for using past history to avoid flush...

Method and computer system for decomposing macroinstructions...

Method and system for nonsequential instruction dispatch and...

Method and system in data processing system of permitting concur

Method for compacting an instruction queue