Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
Reexamination Certificate
2006-09-26
2006-09-26
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction issuing
Simultaneous issuance of multiple instructions
Reexamination Certificate
active
07114058
ABSTRACT:
Methods and apparatuses for dispatching instructions executed by at least one functional unit of a data processor, each one of the instructions having a corresponding priority number, in a data processing system having at least one host processor with host processor cache and host memory are described herein. In one aspect of the invention, an exemplary method includes receiving a next instruction from an instruction stream, examining a current instruction group to determine if the current instruction group is completed, adding the next instruction to the current instruction group if the current instruction group is not completed, and dispatching the current instruction group if the current instruction group is completed.
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Benkual Jack
Bratt Joseph P.
Hochsprung Ronald Ray
Iwamoto Derek Fujio
Trivedi Sushma Shrikant
Apple Computer Inc.
Blakely , Sokoloff, Taylor & Zafman LLP
Chan Eddie
Huisman David J.
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