High speed method for maintaining cache coherency in a multi-lev
High-availability super server
High-performance LRU memory capable of supporting multiple ports
High-speed distributed data processing system and method
High-speed interface for high-density flash with two levels...
High-speed processor system and cache memories with...
High-speed processor system and cache memories with...
High-speed, multiple-port, interleaved cache with arbitration of
Highly efficient design of storage array for use in first...
History-based carry predictor for data cache address generation
History-based prefetch cache including a time queue
Hit bit for indicating whether load buffer entries will hit a ca
Hit determination circuit for selecting a data set based on miss
Hit ratio estimation device, hit ratio estimation method,...
Hot plug cache coherent interface method and apparatus
HTTP acceleration by prediction and pre-fetching
Hybrid cache coherence using fine-grained hardware message...
Hybrid cache/SIRO buffer system
Hybrid NUMA COMA caching system and methods for selecting betwee
Hybrid NUMA COMA caching system and methods for selecting betwee