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False exception for cancelled delayed requests

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fast and accurate cache way selection

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fast exception processing

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fast hardware looping mechanism for cache cleaning and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fast invalidation for cache coherency in distributed shared...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fast invalidation scheme for caches

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fast lane prefetching

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fast linear tag validation unit for use in microprocessor

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fault detection and automatic recovery apparatus or write-read p

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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FIFO control circuit

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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FIFO memory devices and methods of operating FIFO memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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FIFO memory devices having multi-port cache and extended...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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FIFO memory devices having multi-port cache memory arrays...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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FIFO memory system determining full empty using predetermined ad

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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FIFO write/LIFO read trace buffer with software and hardware...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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File server having a file system cache and protocol for truly sa

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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File system for caching web proxies

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Fileserver buffer manager based on file access operation statist

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Filtering basic instruction segments in a processor...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Filtering snooped operations

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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