“Fail-Safe” updating of redundant data in...
“SLIME” cache coherency system for agents with...
1-chip microcomputer having controlled access to a memory...
1394 hard disk sector format selection
48-bit wide memory architecture addressing scheme reconfigurable
64-bit single cycle fetch scheme for megastar architecture
6XX bus with exclusive intervention
Abbreviated burst data transfers for semiconductor memory
Absolute address bits kept in branch history table
Absolute address history table index generation for predicting i
Abuse detection using distributed cache
Accelerated hierarchical address filtering and translation using
Accelerated RAID with rewind capability
Accelerating software lookups by using buffered or ephemeral...
Acceleration of input/output (I/O) communication through...
Accelerator for interpretive environments
Access apparatus and method for accessing a plurality of...
Access circuit with various access data units
Access control apparatus and access control method
Access control apparatus and method for controlling access...