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Back-up method for firmware information

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Background kill system bus transaction to optimize coherency...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Backward inquiry to lower level caches prior to the eviction of

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Balanced access to prevent gateword dominance in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bandwidth enhancement for uncached devices

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bandwidth optimization cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bandwidth reduction technique in a snooping-based...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bandwidth reduction technique using cache-to-cache transfer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bandwidth-adaptive, hybrid, cache-coherence protocol

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Banking render cache for multiple access

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Block data mover adapted to contain faults in a partitioned...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Block transfer method for use with parallel computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Blocking aggressive neighbors in a cache subsystem

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bootable redundant hard disk attached to a PC's parallel port wi

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Branch history cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Branch on cache hit/miss for compiler-assisted miss delay tolera

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Branch predicting mechanism for enhancing accuracy in branch pre

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Branch processing unit with target cache read prioritization pro

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Branch-prediction driven instruction prefetch

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bridge method, bus bridge, and multiprocessor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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