Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1998-01-09
1999-07-20
Robertson, David L.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711148, G06F 1314
Patent
active
059268298
ABSTRACT:
The present invention provides a hybrid Non-Uniform Memory Architecture (NUMA) and Cache-Only Memory Architecture (COMA) caching architecture together with a cache-coherent protocol for a computer system having a plurality of sub-systems coupled to each other via a system interconnect. In one implementation, each sub-system includes at least one processor, a page-oriented COMA cache and a line-oriented hybrid NUMA/COMA cache. Such a hybrid system provides flexibility and efficiency in caching both large and small, and/or sparse and packed data structures. Each sub-system is able to independently store data in COMA mode or in NUMA mode. When caching in COMA mode, a sub-system allocates a page of memory space and then stores the data within the allocated page in its COMA cache. Depending on the implementation, while caching in COMA mode, the sub-system may also store the same data in its hybrid cache for faster access. Conversely, when caching in NUMA mode, the sub-system stores the data, typically a line of data, in its hybrid cache.
REFERENCES:
patent: 5710907 (1998-01-01), Hagersten et al.
Kal Li, et al., Memory Coherence in Shared Virtual Memory Systems, Department of Computer Science, Yale University, pp. 229-239.
Ashley Saulsbury, et al., An Argument for Simple COMA, Swedish Institute of Computer Science.
D. Lenosky, PhD, The Design and Analysis at Dash: A Scalable Directory=Based Multiprocessor, PhD Thesis, Dec. 1991, pp. 36-56.
Erik Hagersten, et al., Simple Coma Node Implementations, Sun Microsystems Computer Corp.
Erik Hagersten, et al., Simple COMA, Swedish Institute of Computer Science, Jul. 1993, pp. 233-259.
Joe, T. et al., Evaluating the Memory Overhead Required for COMA Architectures, Proceedings of the Annual International Symposium on Computer Architecture, Chicago, Apr. 18-24, 1994 No. Symp 21 IEEE pp. 82-93.
Stenstrom, P. et al., Comparative Performance Evaluation of Cache-Coherent NUMA and COMA Architectures, Computer Architecture News, vol. 20, No. 2, May 1, 1992, pp. 80-91.
LaRowe, Jr., R.P. et al, The Robustness of NUMA Memory Management, Proceedings of the Symposium on Operating Systems Principles, Pacific Grove, Oct. 13-16, 1991, No. Symp. 13, Oct. 13, 1991, Association for Computing Machinery, pp. 137-151.
Reinhardt, S.K. et al., Tempest and Typhoon: User-Level Shared Memory, Computer Architecture News, vol. 22, No. 2, Apr. 1, 1994, pp. 325-336.
Krishnamoorthy et al., A Scaleable Distributed Shared Memory Architecture, Journal of Parallel and Distributed Computing, vol. 22, No. 3, pp. 547-554, Sep. 1994.
Hagersten Erik
Zak, Jr. Robert C.
Kivlin B. Noel
Robertson David L.
Sun Microsystems Inc.
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