Controller for hard disk drive having DWFT (data wedge...
Controller that supports data merging utilizing a slice addressa
Controlling cache memory in external chipset using processor
Controlling cached write operations to storage arrays
Controlling flash memory program and erase pulses
Controlling processor access to cache memory
Controlling the replacement of prefetched descriptors in a...
Conversation of distributed memory bandwidth in...
Converting victim writeback to a fill
Cooperation of global and local register allocators for better h
Coprocessor data access control
Cost-based optimization for content distribution using...
Cost-conscious pre-emptive cache line displacement and...
CPU write-back cache coherency mechanism that transeers data fro
CPU write-back cache coherency mechanism that transfers data fro
CPU, information processing device including the CPU, and...
Credit mechanism for multiple banks of shared cache
Credit mechanism for multiple banks of shared cache
Critical loads guided data prefetching
Critical word forwarding in a multiprocessor system