Half-good mode for large L2 cache array topology with...
Handling cache miss in an instruction crossing a cache line...
Handling data writes copied from a remote data storage device
Handling direct memory accesses
Handling duplicate cache misses in a...
Handling fetch requests that return out-of-order at an...
Handling memory faults for mirrored memory
Hard disk cache for CD-ROM and other slow access time devices
Hardware acceleration for a software transactional memory...
Hardware mechanism for optimizing instruction and data prefetchi
Hardware prefetch system based on transfer request address...
Hardware support for partitioning a multiprocessor system to...
Hardware updated metadata for non-volatile mass storage cache
Hardware virtual machine instruction processor
Hardware-assisted tuple space
Hardware-managed programmable associativity caching mechanism mo
Hardware-managed programmable congruence class caching mechanism
Heterogeneous processors sharing a common cache
Heuristic cache tuning
Heuristic for identifying loads guaranteed to hit in...