Controlling cache memory in external chipset using processor

Details Controlling cache memory in external chipset using processor Controlling cache memory in external chipset using processor

2005-06-07

2005-06-07

Portka, Gary J (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S119000, C711S141000

Reexamination Certificate

active

06904499

ABSTRACT:
The present invention is a method and apparatus to control cache. A processor cache unit processes a cache access request from a processor core of a processor. The processor cache unit includes a processor cache controller and a processor cache. A chipset cache controller controls a chipset cache located in a chipset in response to the cache access request from the processor core. The chipset is coupled to the processor via a bus.

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