Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-09-04
2007-09-04
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S163000, C713S324000
Reexamination Certificate
active
10719814
ABSTRACT:
A CPU includes a bus interface, a control unit, an instruction cache, a data cache, a secondary cache, an instruction decoder, an arithmetic unit, and registers. When operations can be performed only with the cache, the CPU inhibits access to external memory and stops power supply to the external memory. With this arrangement, by performing operations in the CPU without using the external memory, it is possible to realize a speedy processing and to stop power supply to the external memory, thus allowing for reduction in power consumption.
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Kamei Naoyuki
Kinoshita Hiroki
Minami Takahiro
Mizuyama Yoshio
Nishimura Michiaki
Conlin David G.
Edwards Angell Palmer & & Dodge LLP
Penny, Jr. John J.
Rutz Jared
Sparks Donald
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