Controlling processor access to cache memory

Details Controlling processor access to cache memory Controlling processor access to cache memory

2011-07-19

2011-07-19

Ellis, Kevin L (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S117000, C711S118000, C711S130000, C711S141000, C711S145000

Reexamination Certificate

active

07984241

ABSTRACT:
A plurality of bits are added to virtual and physical memory addresses to specify the level at which data is stored in a multi-level cache hierarchy. When data is to be written to cache, each cache level determines whether it is permitted to store the data. Storing data at the appropriate cache level addresses the problem of cache thrashing.

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patent: 6643745 (2003-11-01), Palanca et al.
patent: 96630011.3 (1996-02-01), None
Edward Dale, A Discussion of the Design Decisions Made in the Intel Itanium Processor,Computer Architecture, Spring 2003, entire document.

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