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Simultaneous assignment of select I/O objects and clock I/O...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Simultaneous parameter-driven and deterministic simulation...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Simultaneous path optimization (SPO) system and method

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Simultaneous placement of large and small cells in an...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Simultaneously simulate multiple stimuli and verification...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Site control for OPC

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Six-to-one signal/power ratio bump and trace pattern for...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Skeleton generation apparatus and method

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Skew insensitive clocking method and apparatus

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Skew lots for IC oscillators and other analog circuits

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Skew-independent memory architecture

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Slack sensitivity to parameter variation based timing analysis

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Slack sensitivity to parameter variation based timing analysis

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Slack sensitivity to parameter variation based timing analysis

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Slack time analysis through latches on a circuit design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Slack value setting method, slack value setting device, and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Slaveless synchronous system design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Slew constrained minimum cost buffering

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Sliding grid based technique for optimal on-chip decap...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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SLM lithography: printing to below K1=.30 without previous...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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