Simultaneous parameter-driven and deterministic simulation...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C703S013000, C703S014000, C710S005000, C710S006000, C710S007000, C710S020000, C710S021000, C710S058000, C710S059000, C710S060000, C710S061000, C710S260000, C710S261000, C710S262000, C710S263000, C714S724000, C714S728000, C714S738000, C714S739000, C714S740000, C714S741000

Reexamination Certificate

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07865854

ABSTRACT:
A method for allowing simultaneous parameter-driven and deterministic simulation during verification of a hardware design, comprising: enabling a plurality of random parameter-driven commands from a random command generator to execute in a simulation environment during verification of the hardware design through a command managing device; and enabling a plurality of deterministic commands from a manually-driven testcase port to execute in the simulation environment simultaneously with the plurality of random parameter-driven commands during verification of the hardware design through the command managing device, the plurality of deterministic commands and the plurality of random parameter-driven commands each verify the functionality of the hardware design.

REFERENCES:
patent: 7316006 (2008-01-01), Cook et al.
patent: 2004/0249618 (2004-12-01), Fine et al.
patent: 2005/0086565 (2005-04-01), Thompson et al.
IBM, Method for Combining and Controlling Manual and Random Stimulus, Sep. 30, 2004.

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