Simultaneously simulate multiple stimuli and verification...

Details Simultaneously simulate multiple stimuli and verification... Simultaneously simulate multiple stimuli and verification...

2005-08-30

2005-08-30

Thompson, A. M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C703S014000, C703S019000

Reexamination Certificate

active

06938228

ABSTRACT:
A method and apparatus for simulating multiple stimuli using symbolic encoding. In one embodiment, the method comprises encoding a plurality of sets of stimulus to create a symbolic stimulus, symbolically simulating a device under test, including applying the symbolic stimulus to the device under test, and outputting a symbolic result from the device under test in response to the symbolic stimulus.

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