Layout design method for a semiconductor integrated circuit

Details Layout design method for a semiconductor integrated circuit Layout design method for a semiconductor integrated circuit

2011-07-12

2011-07-12

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S123000, C716S129000, C716S130000, C716S136000

Reexamination Certificate

active

07979830

ABSTRACT:
A method of designing a layout of a semiconductor integrated circuit having a hard macro includes acquiring a condition for permitting wirings with respect to a given region within the hard macro, and searching a passing wiring that passes through the given region among the wirings that are arranged on the semiconductor integrated circuit. The method further includes allowing a normal passing wiring that satisfies the condition to pass through the hard macro, and wiring a defaulting passing wiring that does not satisfy the condition so as to bypass the hard macro among the searched passing wirings.

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