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Chip size semiconductor packages with stacked dies

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip size stack package and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip size stack package, memory module having the same, and...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip sized package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Patent

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Chip sized semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – By pressure alone
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Chip stack and method of making same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Patent

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Chip stack employing a flex circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip stack package

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor
Reexamination Certificate

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Chip stack package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Patent

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Chip stack package and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip stack package and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip stack package utilizing a connecting hole to improve...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip stack package utilizing a dummy pattern die between...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip stack package, connecting board, and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip stack with differing chip package types

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip stack, chip stack package, and method of forming chip...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip stack-type semiconductor package and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip stacking by edge metallization

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Patent

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Chip stacking structure

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate

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Chip structure

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
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