Chip stack package, connecting board, and method of...

Details Chip stack package, connecting board, and method of... Chip stack package, connecting board, and method of...

2007-10-23

2007-10-23

Chambliss, Alonzo (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S690000, C257S730000, C361S735000, C361S790000

Reexamination Certificate

active

10845138

ABSTRACT:
A chip stack package, a connecting board, and a method of connecting multiple, stacked semiconductor chips multi-chip package comprises a plurality of stacked packages including an upper package and a lower package. Each connecting board includes a board, including a wall and an opening, the wall including a top portion and a side portion, wherein the lower package may be secured in the opening; and a connecting portion, located on the top portion and the side portion of the wall. The respective packages are electrically connected by the connecting portion with one or more elements of each board/package pair being in vertical or substantially vertical alignment.

REFERENCES:
patent: 6297551 (2001-10-01), Dudderar et al.
patent: 6323060 (2001-11-01), Isaak
patent: 6480389 (2002-11-01), Shie et al.
patent: 6861737 (2005-03-01), Jeong et al.
patent: 2003/0067264 (2003-04-01), Takekuma
patent: 2001-274324 (2001-10-01), None
patent: 2002-057279 (2002-02-01), None
patent: 10-0206893 (1999-04-01), None

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