Chip sized semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – By pressure alone

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Details

257737, 257786, H01L 2348, H01L 2940

Patent

active

056775768

ABSTRACT:
A chip sized semiconductor device includes a semiconductor chip having upper and lower surfaces. The chip has electrodes formed on the upper surface thereof. An electrically insulating passivation film is formed on the upper surface of the semiconductor chip, except for areas where the electrodes exist. An anisotropic conductive sheet has an upper surface providing with a circuit pattern formed thereon and a second surface being adhered to the passivation film. The circuit pattern has inner and outer connecting portions. The electrically insulating film covers the upper surface of the anisotropic conductive sheet so that the outer connecting portions of the circuit pattern are exposed to be connected to external connecting terminals. The anisotropic conductive sheet is partially pressed at positions correspond to the electrodes, so that the inner portions of the circuit pattern are electrically connected to said electrodes of the semiconductor chip.

REFERENCES:
patent: 4811081 (1989-03-01), Lyden
patent: 5113241 (1992-05-01), Yanagida et al.
Patent Abstract of Japan No. 3244140, vol. 16, No. 31 (Jan. 27, 1992).
Patent Abstract of Japan No. 60-116157, vol. 9, No. 270 (Jun. 22, 1985).
Patent Abstract of Japan No. 63-4633, vol. 12, No. 207 (Jan. 9, 1988).

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