Search
Selected: B

Backend metallization method and device obtained therefrom

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Backside support for thin wafers

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ball assignment system

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ball grid array casing for integrated circuits

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ball grid array package and method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ball grid array package and method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ball grid array type semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Barrier film integrity on porous low k dielectrics by...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Barrier film integrity on porous low k dielectrics by...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Barrier layer for interconnect structures of a semiconductor...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Barrier metal oxide interconnect cap in integrated circuits

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Barrier structure for semiconductor devices

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

BGA package using PCB and tape in a die-up configuration

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

BGA package with concave shaped bonding pads

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Bi-level digit line architecture for high density DRAMs

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Bi-level digit line architecture for high density DRAMS

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Bi-level digit line architecture for high density drams

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Bi-level digit line architecture for high density DRAMS

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Bond pad having reduced capacitance and method for reducing...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Bond pad rerouting element, rerouted semiconductor devices...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.