Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2008-01-15
2008-01-15
Parekh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S786000, C257S728000, C257SE23070
Reexamination Certificate
active
07319272
ABSTRACT:
A pattern of contacts that includes high speed transmitter contacts disposed in a first portion of the pattern, where the high speed transmitter contacts are disposed in transmitter differential pairs. High speed receiver contacts are disposed in a second portion of the pattern, where the first portion of the pattern is not interspersed with the second portion of the pattern, and the high speed receiver contacts are disposed in receiver differential pairs. At least one unbroken line of other contacts is disposed between the first portion of the pattern and the second portion of the pattern, where the other contacts do not contain any high speed transmitter contacts and high speed receiver contacts. Low speed IO contacts are disposed in a third portion of the pattern, where the third portion of the pattern is disposed in an interior portion of the pattern relative to both the first portion of the pattern and the second portion of the pattern. Substantially all of the contacts are disposed at a standard pitch one from another on a single contact surface.
REFERENCES:
patent: 5686764 (1997-11-01), Fulcher
patent: 5952726 (1999-09-01), Liang
patent: 6433441 (2002-08-01), Niwa et al.
Ghahghahi Farshad
Miller Leah M.
Ramakrishnan Arun
Thurairajaratnam Aritharan
LSI Logic Corporation
Luedeka Neely & Graham P.C.
Parekh Nitin
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