Bond pad having reduced capacitance and method for reducing...

Details Bond pad having reduced capacitance and method for reducing... Bond pad having reduced capacitance and method for reducing...

2000-02-16

2002-05-14

Tran, Minh Loan (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S786000, C257S781000, C257S784000, C257S758000, C257S734000

Reexamination Certificate

active

06388331

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a bond pad having reduced capacitance which is useful in fabricating integrated circuit and communications devices and to a method of reducing the capacitance of a bond pad.
BACKGROUND OF THE INVENTION
Communications systems typically include a variety of devices (e.g., integrated circuits, light sources, photodetectors, switches, optical fibers, amplifiers, filters, and so forth). Communications systems are useful for transmitting information, such as information relayed by optical signals, over long distances at high speeds. As communications systems become more advanced, signals are being transmitted at higher frequencies. However, high-speed devices are plagued by parasitic capacitances that can be detrimental to the performance. A major contributor to parasitic capacitance is that associated with bond pads.
Bond pads find many applications in connecting integrated circuit devices and components of communications systems. See, e.g., U.S. Pat. No. 5,976,964 to Ball, “
Method of Improving Interconnect of Semiconductor Device by Utilizing a Flattened Ball Bond
”; U.S. Pat. No. 5,587,336 to Wang et al., “
Bump Formation on Yielded Semiconductor Dies
,” and U.S. Pat. No. 5,577,944 to Taylor, “
Interconnect for Use in Flat Panel Display
,” incorporated herein. A top view of a communications device including a typical bond pad is schematically illustrated in
FIG. 1A
, with a side view shown in FIG.
1
B. The bond pad
10
, which typically is fabricated with gold (Au), is disposed on a substrate
8
with an insulating layer
11
therebetween (hidden from view in FIG.
1
A). The insulating layer
11
may be comprised, for example, of SiO
2
or semi-insulating InP. The bond pad
10
is connected to the device
12
by an interconnect
13
which may take various dimensions. For example, the interconnect may be fabricated with the same material as the bond pad, comprise a bond wire, or be fabricated with other materials as known in the field.
A large bond pad is disadvantageous with regard to the system capacitance, but is used to achieve good adhesion of the pad to the insulating layer and interconnect. The interconnect does not require a large surface area to achieve a good electrical connection. As may be appreciated, it would be advantageous to provide a bond pad that maintains the advantages of achieving good adhesion and yet has less parasitic capacitance.
SUMMARY OF THE INVENTION
Summarily described, the invention embraces a bond pad structure that has a reduced capacitance and yet maintains good adhesion and electrical connection properties. The bond pad is adapted for coupling a device with an interconnect. The bond pad is disposed within a select pad area. It includes a two-phased region of air and conductive bonding material within the select pad area and a ribbon of conductive material within the select pad area overlapping the two-phased region. An interconnect is coupled to the ribbon and to the device. In a preferred embodiment, the regions of air and bonding material define a mesh geometry. Including air within the bond pad structure reduces the capacitance of the device, while the surface area of the bonding pad is maintained to at least substantially retain the adhesive properties of the pad. The ribbon of conductive material maintains good electrical properties for the bond pad.


REFERENCES:
patent: 5577944 (1996-11-01), Taylor
patent: 5587336 (1996-12-01), Wang et al.
patent: 5976964 (1999-11-01), Ball
patent: 363141330 (1988-06-01), None
patent: 363161634 (1988-07-01), None
patent: 401309340 (1989-12-01), None

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