Ball grid array package and method thereof

Details Ball grid array package and method thereof Ball grid array package and method thereof

2008-01-01

2008-01-01

Parekh, Nitin (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S786000, C257S779000, C257S780000, C257SE23020

Reexamination Certificate

active

10974936

ABSTRACT:
A ball grid array package includes a substrate, a chip, a plurality of pads, a solder mask, a plurality of partitioning walls, and a plurality of solder balls. The substrate has an upper surface and a lower surface opposite to the upper surface. The chip is disposed on the upper surface of the substrate. The pads are disposed on the lower surface of the substrate and electrically connected to the chip. The solder mask is disposed on the lower surface of the substrate. The partitioning walls are disposed on the solder mask and between the adjacent pads. The solder balls are respectively disposed on the pads.

REFERENCES:
patent: 5636104 (1997-06-01), Oh
patent: 5969426 (1999-10-01), Baba et al.
patent: 7071569 (2006-07-01), Ho et al.
patent: 2002/0111054 (2002-08-01), Huang et al.
patent: 2004/0041393 (2004-03-01), Lee
patent: 2004/0141298 (2004-07-01), Harvey

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