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Capacitive semiconductor sensor

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Capillary underfill of stacked wafers

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Carbon nanotube via interconnect

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Cascade-type chip module

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Patent

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Chip arrangement and method of manufacturing a chip arrangement

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip capacitive coupling

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip mounting substrate, first level assembly, and second...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip on chip device including basic chips capable of...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip package structure

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip size semiconductor packages with stacked dies

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip size stack package and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip stack package and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip stack package and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip with internal signal routing in external element

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip-on-chip IC packages

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Patent

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Chip-on-chip integrated circuit package and method for making th

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Patent

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Chip-on-chip interconnections of varied characteristics

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Circuit and method for providing interconnections among...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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