Chip-on-chip IC packages

Details Chip-on-chip IC packages Chip-on-chip IC packages

1997-10-08

1999-04-27

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

257778, 257738, 257779, H01L 2348, H01L 2352, H01L 2940

Patent

active

058982230

ABSTRACT:
The specification describes interconnection layouts for chip-on-chip packages using solder bump interchip connections as vias between a single level metal interconnection pattern on the lower support IC chip and another single level interconnection pattern on the upper IC chip. This arrangement allows for the formation of air isolated crossovers of features on either chip.

REFERENCES:
patent: 4764804 (1988-08-01), Sahara et al.
patent: 5034345 (1991-07-01), Shirahata
patent: 5480834 (1996-01-01), Lake et al.
patent: 5534465 (1996-07-01), Frye et al.
patent: 5585282 (1996-12-01), Wood et al.
patent: 5726500 (1998-03-01), Duboz et al.

Affiliated with

Also associated with

Rating

Chip-on-chip IC packages does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Chip-on-chip IC packages, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Chip-on-chip IC packages will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-687106