Chip-on-chip integrated circuit package and method for making th

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

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Details

257693, 257787, 257779, H01L 2348, H01L 2352, H01L 2940

Patent

active

06084308&

ABSTRACT:
A chip-on-chip integrated circuit package is disclosed. The device includes a substrate having a plurality of conductive landings disposed on a first surface thereof, a first die that is positioned over a substrate, and a second die that is mounted on the first die. The first die has a plurality of I/O pads that face away from the substrate. The second die includes a first set of contacts that mate with the conductive landings on the substrate and a second set of contacts that mate with the I/O pads on the first die. In a preferred embodiment, the first set of contacts on the second die take the form of a first set of solder bumps, and the second set of contacts on the second die take the form of a second set of solder bumps. The device may also include a die attach material for attaching the first die to the substrate, wherein the die attach material and the first and second sets of solder bumps have a configuration that facilitates bonding and at least a portion of each of the solder bumps in the first and second sets of solder bumps and the die attach material have a substantially common reflow temperature. A method for making a chip-on-chip integrated circuit package is also disclosed.

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patent: 5579208 (1996-11-01), Honda et al.
patent: 5608262 (1997-03-01), Degani et al.
patent: 5723369 (1998-03-01), Barber
patent: 5726079 (1998-03-01), Johnson
patent: 5790384 (1998-08-01), Ahmad et al.
patent: 5798567 (1998-08-01), Kelly et al.

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