Chip package

Details Chip package Chip package

2008-08-26

2009-12-29

Clark, Jasmine J (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S673000, C257S780000, C257S781000, C257S782000, C257S783000, C257S787000, C257SE23018, C257SE23033, C257SE23039, C257SE23127, C257SE21511

Reexamination Certificate

active

07638880

ABSTRACT:
A chip package including a carrier having an opening, a first chip, bumps, a second chip, bonding wires, a first adhesive layer and a molding compound is provided. The first chip and the second chip are disposed at two opposite side of the carrier. The bumps are disposed between the carrier and a first active surface of the first chip to electrically connect with the first chip and the carrier. The bonding wires pass through the opening of the carrier and are electrically connected with the carrier and the second chip. The first adhesive layer adhered between the first active surface of the first chip and the carrier includes a first B-staged adhesive layer adhered on the first active surface of the first chip and a second B-staged adhesive layer adhered between the first B-staged adhesive layer and the carrier.

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U.S. Office Action Summary of U.S. Appl. No. 12/198,517, dated May 13, 2009.
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Chinese First Examination Report of China Application No. 2008101755291, dated on Aug. 29, 2009.

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