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Efficent column redundancy techniques

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Efficiency improved DRAM row redundancy circuit

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Efficient addressing of large memories

Static information storage and retrieval – Addressing – Multiplexing
Patent

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Efficient and accurate sensing circuit and technique for low...

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Efficient and robust random access memory cell suitable for...

Static information storage and retrieval – Systems using particular element – Flip-flop
Reexamination Certificate

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Efficient and robust random access memory cell suitable for...

Static information storage and retrieval – Systems using particular element – Flip-flop
Reexamination Certificate

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Efficient back bias (V.sub.BB) detection and control scheme for

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent

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Efficient back bias (VBB) detection and control scheme for...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Efficient circuit and method to measure resistance thresholds

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Efficient column redundancy techniques

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Efficient content addressable memory array for classless...

Static information storage and retrieval – Associative memories – Ferroelectric cell
Reexamination Certificate

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Efficient dual port DRAM cell using SOI technology

Static information storage and retrieval – Systems using particular element – Capacitors
Reexamination Certificate

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Efficient erase algorithm for SONOS-type NAND flash

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Efficient implementation of a read scheme for multi-threaded...

Static information storage and retrieval – Read/write circuit
Reexamination Certificate

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Efficient latch array initialization

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Efficient local-bus ROM memory for microprocessor systems

Static information storage and retrieval – Addressing – Using selective matrix
Patent

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Efficient local-bus ROM memory for microprocessor systems

Static information storage and retrieval – Addressing – Using selective matrix
Patent

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Efficient management method of memory cell array

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Efficient method for obtaining usable parts from a partially goo

Static information storage and retrieval – Powering
Patent

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Efficient method for obtaining usable parts from a partially goo

Static information storage and retrieval – Read/write circuit – Testing
Patent

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