Static information storage and retrieval – Addressing – Using selective matrix
Patent
1995-06-06
1996-11-05
Dinh, Son T.
Static information storage and retrieval
Addressing
Using selective matrix
365103, 36523003, G11C 802
Patent
active
055724817
ABSTRACT:
An efficient technique or providing ROM memory on a microprocessor local bus is described whereby a ROM and all necessary address decoding and control circuitry is incorporated in a single integrated circuit. By doing this, only one chip is required to add ROM to a microprocessor local bus, saving considerable space and power over discrete implementations. The ROM is implemented in a wide memory format, matching the bus width of the microprocessor to which it is connected. This permits full-speed access to the local bus ROM, and eliminates any need for such techniques as ROM "shadowing".
REFERENCES:
patent: 5040153 (1991-08-01), Fung et al.
patent: 5477503 (1995-12-01), Wilson
Dinh Son T.
LSI Logic Corporation
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