Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2007-06-12
2007-06-12
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S189020, C365S200000
Reexamination Certificate
active
11064218
ABSTRACT:
The present invention relates to a system and method adapted to increase memory cell and memory architecture design yield. The present invention includes memory architecture having a decoder and a multi-bank memory. The decoder is adapted to decode addresses. The multi-bank memory interacts with the decoder, wherein the multi-bank memory includes at least one output data bit adapted to complete a word for a failing bank in the multi-bank memory.
REFERENCES:
patent: 5383156 (1995-01-01), Komatsu
patent: 5446692 (1995-08-01), Haraguchi et al.
patent: 5506807 (1996-04-01), Ferrant et al.
patent: 5568432 (1996-10-01), Wada
patent: 5673227 (1997-09-01), Engles et al.
patent: 5822268 (1998-10-01), Kirihata
patent: 6104648 (2000-08-01), Ooishi
patent: 6373759 (2002-04-01), Yamauchi
patent: 6411557 (2002-06-01), Terzioglu et al.
patent: 6424554 (2002-07-01), Kawasumi
patent: 6449182 (2002-09-01), Ooishi
patent: 6459630 (2002-10-01), Nakayama et al.
patent: 6519192 (2003-02-01), Ooishi
patent: 6525963 (2003-02-01), Kern et al.
patent: 6542421 (2003-04-01), Sugamoto et al.
patent: 6567323 (2003-05-01), Pitts et al.
patent: 6724669 (2004-04-01), Bhatia
Terzioglu Esin
Winograd Gil I.
Broadcom Corporation
McAndrews Held & Malloy Ltd.
Nguyen Tan T.
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