Reference voltage regulator for eDRAM with VSS-sensing

Reference voltage source for memory cells

Reference word line and data propagation reproduction circuit fo

Refresh address counter test control circuit for dynamic random

Refresh apparatus for semiconductor memory device, and...

Refresh arrangement in a block divided memory including a plural

Refresh cell for a random access memory

Refresh characteristic testing circuit and method for...

Refresh circuit for DRAM with three-transistor type memory cells

Refresh circuit for SDRAM

Refresh circuit for use in semiconductor memory device and...

Refresh circuit having variable restore time according to...

Refresh control and internal voltage generation in...

Refresh control circuit

Refresh control circuit

Refresh control circuit and method for multi-bank structure...

Refresh control circuit and method for multi-bank structure...

Refresh control circuit and method for performing a...

Refresh control circuit and method for performing a...

Refresh control circuit and method for semiconductor memory...