Refresh circuit for use in semiconductor memory device and...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S230030

Reexamination Certificate

active

11318527

ABSTRACT:
A refresh circuit for individually performing a refresh operation to a plurality of banks included in a semiconductor memory device, includes: a perbank counter for generating a refresh bank address according to a refresh pulse signal and a perbank command; a perbank multiplexer for selectively outputting one of the refresh bank address and a data access bank address in response to the perbank command; and an internal command state machine for generating a refresh command in response to the refresh pulse signal and the perbank command.

REFERENCES:
patent: 5966725 (1999-10-01), Tabo
patent: 6400631 (2002-06-01), Williams et al.
patent: 7088633 (2006-08-01), Remaklus et al.
patent: 2001/0007538 (2001-07-01), Leung
patent: 2005/0068826 (2005-03-01), Hoehler
patent: 2005/0108460 (2005-05-01), David
patent: 10-247384 (1998-09-01), None
patent: 2003-16782 (2003-01-01), None

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