Reference voltage regulator for eDRAM with VSS-sensing

Details Reference voltage regulator for eDRAM with VSS-sensing Reference voltage regulator for eDRAM with VSS-sensing

2010-06-09

2011-11-15

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

Reexamination Certificate

active

08059475

ABSTRACT:
A reference voltage regulator for an embedded dynamic random access memory (eDRAM) employing VSS-sensing with a reference level includes an oscillator, a control block, a reference generator, a comparator, a pulse generator, a driver, and a reference voltage output, where the oscillator sends requests for sampling and correction to the control block between accesses of the eDRAM, the control block sends a pulse defining a time interval during which sampling and correction occurs to the pulse generator, the reference generator provides the reference level for comparison by the comparator with a sampling of the reference voltage output, the comparator decides if the reference voltage output requires correction and sends a correction request to the pulse generator if necessary, the pulse generator produces a correction pulse for the driver according to the correction request from the comparator, and the driver adjusts the reference voltage output during the correction pulse.

REFERENCES:
patent: 6351426 (2002-02-01), Ohsawa
patent: 6954371 (2005-10-01), Hokari et al.
patent: 7701735 (2010-04-01), Park et al.
patent: 2006/0274564 (2006-12-01), Kim

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