Memory architecture having a reference current generator...
Memory array incorporating noise detection line
Memory cell array
Memory cell sensing with low noise generation
Memory cell sensing with low noise generation
Memory circuit with improved word line noise preventing circuits
Memory circuit with noise preventing means for word lines
Memory device and method with improved power and noise...
Memory device with reduced leakage current
Method and apparatus for determining the robustness of memory ce
Method and apparatus for reading memory cells of a resistive...
Method and circuit for suppressing data loading noise in nonvola
Method for suppressing peak current in a video RAM and in a seri
Methods for reducing the effects of power supply distribution re
Methods for reducing the effects of power supply...
MOS semiconductor memory device having sense control circuitry s
MOS-Integrated circuit arrangement for suppressing quiescent cur