Method for suppressing peak current in a video RAM and in a seri

Details Method for suppressing peak current in a video RAM and in a seri Method for suppressing peak current in a video RAM and in a seri

1994-12-02

1996-07-02

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Noise suppression

365226, G11C 702

Patent

active

055329675

ABSTRACT:
A video RAM capable of minimizing the peak current generated during a data transfer operation performed between a RAM and a SAM, and a method for suppressing the peak current in a SAM block. The video RAM comprises a first power source, a second power source, unit latch circuit which inputs the first and second power sources as a source power, a SAM block composed of a plurality of unit latch circuits, and peak current suppression means formed on a path through which the first and second power sources are inputted to the unit latch circuit.

REFERENCES:
patent: 4400802 (1983-08-01), Rydval
patent: 4733375 (1988-03-01), Terashima
patent: 5280453 (1994-01-01), Miyawaki et al.

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