Memory cell sensing with low noise generation

Details Memory cell sensing with low noise generation Memory cell sensing with low noise generation

2005-02-01

2005-02-01

Nelms, David (Department: 2818)

Static information storage and retrieval

Read/write circuit

Noise suppression

C365S185080, C365S220000, C365S230030, C365S233100, C711S167000

Reexamination Certificate

active

06850446

ABSTRACT:
Various methods, apparatuses and systems in which a memory uses a noise reduction circuit to sense groups of memory cells. The memory has a plurality of memory cells organized into groups of memory cells. The noise reduction circuit performs a sense operation on a first group of memory cells at the substantially the same time. The noise reduction circuit performs a sense operation on a second group of memory cells at substantially the same time. The noise reduction circuit has timing circuitry to sense the second group of memory cells after the sense of the first group initiates but prior to the completion of the sense operation on the first group of memory cells.

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