Memory architecture having a reference current generator...

Static information storage and retrieval – Read/write circuit – Noise suppression

Reexamination Certificate

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C365S207000, C365S208000, C365S189060, C365S210130

Reexamination Certificate

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07969804

ABSTRACT:
A memory architecture is provided with an array of non-volatile memory cells arranged in rows and columns, and a sense amplifier coupled to at least one column within the array for sensing a data bit stored within one of the non-volatile memory cells. In order to provide accurate sensing, a reference current generator is provided and coupled to the sense amplifier. The reference current generator provides a first reference current having adjustable magnitude and adjustable slope, and a second reference current having adjustable magnitude, but constant slope. The first reference current is supplied to the sense amplifier for sensing the data bit. The second reference current is supplied to a control block for generating clock signals used to control sense amplifier timing.

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